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56F8122 参数 Datasheet PDF下载

56F8122图片预览
型号: 56F8122
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 136 页 / 718 K
品牌: FREESCALE [ Freescale ]
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10.13 Controller Area Network (CAN) Timing  
Note: CAN is NOT available in the 56F8122 device.  
1
Table 10-22 CAN Timing  
Characteristic  
Baud Rate  
Bus Wake-up detection  
Symbol  
Min  
Max  
Unit  
See Figure  
BRCAN  
1
Mbps  
T WAKEUP  
TIPBUS  
μs  
10-17  
1. Parameters listed are guaranteed by design  
MSCAN_RX  
CAN receive  
data pin  
T WAKEUP  
(Input)  
Figure 10-17 Bus Wakeup Detection  
10.14 JTAG Timing  
Table 10-23 JTAG Timing  
Characteristic  
Symbol  
Min  
Max  
Unit  
See Figure  
TCK frequency of operation using  
EOnCE1  
fOP  
DC  
SYS_CLK/8  
MHz  
MHz  
10-18  
10-18  
TCK frequency of operation not  
using EOnCE1  
fOP  
DC  
SYS_CLK/4  
TCK clock pulse width  
tPW  
tDS  
tDH  
tDV  
tTS  
50  
5
30  
30  
ns  
ns  
ns  
ns  
ns  
10-18  
10-19  
10-19  
10-19  
10-19  
TMS, TDI data set-up time  
TMS, TDI data hold time  
TCK low to TDO data valid  
TCK low to TDO tri-state  
5
1. TCK frequency of operation must be less than 1/8 the processor rate.  
56F8322 Techncial Data, Rev. 16  
120  
Freescale Semiconductor  
Preliminary