Table 2-3 56F8037 Signal and Package Information for the 64-Pin LQFP (Continued)
Signal
Name
LQFP
Pin No.
StateDuring
Reset
Type
Signal Description
GPIOB4
38
Input/
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
(SS1)
Input/
QSPI1 Slave Select — This is used in slave mode to indicate to the
Output
QSPI1 module that the current transfer is to be received.
(TB018
)
)
Input/
Output
TB0 — Timer B, Channel 0
TA0 — Timer A, Channel 0
Input/
Output
(TA019
Input
PSRC2 — External PWM signal source input for the complementary
PWM0/PWM1 pair.
(PSRC2)
(CLKO)
Output
Clock Output — This is a buffered clock output; the clock source is
selected by Clockout Select (CLKOSEL) bits in the Clock Output
Select Register (CLKOUT). See Section 6.3.7.
After reset, the default state is GPIOB4. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
18The TB0 signal is also brought out on the GPIOB4 and GPIOB10 pins.
19The TA0 signal is also brought out on the GPIOB4 and GPIOA6 pins.
GPIOB5
4
Input/
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
(TA120
)
Input/
Output
TA1 — Timer A, Channel 1
Input
Input
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
(FAULT3)
(CLKIN)
External Clock Input— This pin serves as an external clock input.
After reset, the default state is GPIOB5. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
20The TA1 signal is also brought out on the GPIOA12 pin.
Return to Table 2-2
56F8037 Data Sheet, Rev. 3
30
Freescale Semiconductor
Preliminary