Document Revision History
Version History
Rev. 0
Description of Change
Initial public release.
Rev. 1
• In Table 10-4, added an entry for flash data retention with less than 100 program/erase
cycles (minimum 20 years).
• In Table 10-6, changed the device clock speed in STOP mode from 8MHz to 4MHz.
• In Table 10-12, changed the typical relaxation oscillator output frequency in Standby mode
from 400kHz to 200kHz.
• Changed input propagation delay values in Table 10-21 as follows:
Old values: 1 μs typical, 2 μs maximum
New values: 35 ns typical, 45 ns maximum
Rev. 2
Rev. 3
In Table 10-20, changed the maximum ADC internal clock frequency from 8MHz to 5.33MHz.
• Added the following note to the description of the TMS signal in Table 2-3:
Note: Always tie the TMS pin to VDD through a 2.2K resistor.
• Changed the description of the GPIOC4 signal in Table 2-3 (was “...the signal goes to both
the ANA0 and CMPAI3”, is “...the signal goes to both ANB0 and CMPB13”).
Please see http://www.freescale.com for the most current data sheet revision.
56F8037 Data Sheet, Rev. 3
2
Freescale Semiconductor
Preliminary
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