Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56F801 are organized into functional groups, as shown in
and as illustrated in
In
through
each table row describes the signal or
signals present on a pin.
Table 2-1 Functional Group Pin Allocations
Functional Group
Power (V
DD
or V
DDA
)
Ground (V
SS
or V
SSA
)
Supply Capacitors
PLL and Clock
Interrupt and Program Control
Pulse Width Modulator (PWM) Port
Serial Peripheral Interface (SPI) Port
1
Serial Communications Interface (SCI) Port
1
Analog-to-Digital Converter (ADC) Port
Quad Timer Module Port
JTAG/On-Chip Emulation (OnCE)
1. Alternately, GPIO pins
Number of
Pins
5
6
2
2
2
7
4
2
9
3
6
Detailed
Description
56F801 Technical Data, Rev. 16
8
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
