PIN CONNECTIONS
PIN CONNECTIONS
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
VIN
PGNDB
SWB
CK
VDC3
SLOPE
NIN
TRANSPARENT
TOP VIEW
SWA
QFN - EP
5MM X 5MM
32 LEAD
PGNDA
A0/SEN
EN
PIN
EP GND
ISET
FAIL
I9
IO
9
10
I2
11
I3
12
I4
13
I5
14
I6
15
I7
16
I8
EP = Exposed Pad
I1
Figure 3. 34844 Pin Connections
Table 1. 34844 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 11.
Pin Number Pin Name Pin Function
Formal Name
Input voltage
Power Ground
Switch node B
Switch node A
Power Ground
Device Select
Enable
Definition
1
VIN
Input supply
Power
Power
Input
2
Power ground
PGNDB
SWB
3
Boost switch connection B
Boost switch connection A
Power ground
4
5
SWA
Input
PGNDA
A0/SEN
EN
Power
Input
6
Address select, device select pin or OVP HW control
Enable pin (active high, internal pull-up)
LED string connections
7
Input
8 - 17
18
LED Channel
Fault detection
I0-I9
FAIL
Input
Fault detected pin (open drain):
No Failure = Low-impedance
Failure = High-impedance
Open Drain
19
20
21
22
23
24
ISET
PIN
Current set
LED current setting resistor
Passive
Input
Positive current scale Positive input analog current control
Negative current scale Negative input analog current control
NIN
Input
SLOPE
VDC3
CK
Boost Slope
Internal Regulator 3
Clock signal
Boost slope compensation Setting resistor
Passive
Output
Decoupling capacitor for internal phase locked loop power
Clock synchronization pin (input for M/~S = low - internal pull-up, output
for M/~S = high)
Input/Output
25
PWM
External PWM
External PWM input (internal pull-down)
Input
34844
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
FREESCALE [ Freescale ]
