ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
VIH
RSTB
RST
0.2 VDD
TwRSTB
VIL
TCSB
TENBL
VIH
VIL
0.7VDD
CS
CSB
0.7VDD
TwSCLKh
TrSI
Tlead
0.7VDD
0.2VDD
Tlag
VIH
SCLK
SCLK
VIL
TSIsu
TwSCLKl
TSI(hold)
TfSI
VIH
0.7 VDD
0.2VDD
Don’t Care
Don’t Care
Don’t Care
Valid
Valid
SI
SI
VIL
Figure 3. Input Timing Switching Characteristics
TrSI
TfSI
VOH
VOL
3.5V
50%
SCLK
1.0V
TdlyLH
0.2 VDD
Low-to-High
VOH
VOL
0.7 VDD
SO
TrSO
Tvalid
TfSO
SO
VOH
VOL
0.7 VDD
High-to-Low
0.2VDD
TdlyHL
Figure 4. Valid Data Delay Time and Valid Time Waveforms
33991
Analog Integrated Circuit Device Data
Freescale Semiconductor
11