PIN CONNECTIONS
PIN CONNECTIONS
WAKE
CSNS
SCLK
VDD
RST
FSI
12 11 10 9 8
Figure 3. 33984 Pin Connections (Transparent Top View)
Table 2. Pin Definitions
Functional descriptions of many of these pins can be found in the Functional Pin Description section beginning on
Pin
1
Pin Name
CSNS
Pin
Function
Output
Formal Name
Output Current Monitoring
Definition
This pin is used to output a current proportional to the designated
HS0-1 output.
This pin is used to input a Logic [1] signal so as to enable the
watchdog timer function.
This input pin is used to initialize the device configuration and fault
registers, as well as place the device in a low current Sleep mode.
This input pin is used to directly control the output HS0.
This is an open drain configured output requiring an external pull-up
resistor to VDD for fault reporting.
The value of the resistance connected between this pin and ground
determines the state of the outputs after a watchdog timeout occurs.
This input pin is connected to a chip select output of a master
microcontroller (MCU).
This input pin is connected to the MCU providing the required bit shift
clock for SPI communication.
This is a command data input pin connected to the SPI Serial Data
Output of the MCU or to the SO pin of the previous device of a daisy
chain of devices.
This is an external voltage input pin used to supply power to the SPI
circuit.
IN1
IN0
SO
CS
7
FS
15
HS1
SI
6 5
4
3 2
1
13
GND
TRANSPARENT
TOP VIEW
14
VPWR
16
HS0
2
WAKE
Input
Wake
3
RST
Input
Reset (Active Low)
4
5
IN0
FS
Input
Output
Direct Input 0
Fault Status (Active Low)
6
FSI
Input
Fail-safe Input
7
CS
Input
Chip Select (Active Low)
8
SCLK
Input
Serial Clock
9
SI
Input
Serial Input
10
VDD
Input
Digital Drain Voltage
(Power)
33984
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
