PIN CONNECTIONS
PIN CONNECTIONS
GND
SI
SCLK
CS
SP0
SP1
SP2
SP3
SG0
SG1
SG2
SG3
SG4
SG5
SG6
VPWR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
SO
VDD
AMUX
INT
SP7
SP6
SP5
SP4
SG7
SG8
SG9
SG10
SG11
SG12
SG13
WAKE
Figure 3. 33975 Pin Connections
Table 2. Pin Definitions
A functional description of each Pin can be found in the Functional Pin Description section on page
Pin
1
2
3
4
5–8
25–28
9–15,
18–24
16
17
29
30
31
32
Pin Name
GND
SI
SCLK
CS
SPn
SGn
VPWR
WAKE
INT
AMUX
VDD
SO
Formal Name
Ground
SPI Slave In
Serial Clock
Chip Select
Programmable Switches 0–3
Programmable Switches 4–7
Switch-to-Ground Inputs 0–6
Switch-to-Ground Inputs 13–7
Battery Input
Wake-up
Interrupt
Analog Multiplex Output
Voltage Drain Supply
SPI Slave Out
Description
Ground for logic, analog, and switch-to-battery inputs
SPI control data input pin from MCU to 33975
SPI control clock input pin
SPI control chip select input pin from MCU to 33975. Logic [0] allows data to be
transferred in
Programmable switch-to-battery or switch-to-ground input pins
Switch-to-ground input pins
Battery supply input pin. This pin requires external reverse battery protection.
Open drain wake-up output is designed to control a power supply enable pin
Open-drain output to MCU is used to indicate input switch change of state
Analog multiplex output
3.3/5.0V supply sets SPI communication level for the SO driver
Provides digital data from 33975 to the MCU
33975
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
