INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
RST IRQ
VS2
VS1
VDD
INTERNAL BUS
INTERRUPT
CONTROL
MODULE
LVI, HVI, HTI, OCI
AGND
VOLTAGE REGULATOR
RESET CONTROL
MODULE
LVR, HVR, HTR, WD
5V OUTPUT
MODULE
HVDD
LS1
WINDOW
WATCHDOG
MODULE
PWMIN
VS2
MISO
MOSI
SCLK
CS
ADOUT0
HIGH SIDE
CONTROL
MODULE
SPI
&
CONTROL
ANALOG MULTIPLEXER
V
BAT
SENSE MODULE
CHIP TEMPERATURE
SENSE MODULE
L1
ANALOG INPUT
MODULE
L2
L3
RXD
TXD
DIGITAL INPUT MODULE
LOW SIDE
CONTROL
MODULE
LS2
PGND
VS2
HS1
HS2
VSENSE
WAKE-UP MODULE
LIN PHYSICAL
LAYER
L4
LIN
ISENSEH
CURRENT SENSE MODULE
ISENSEL
LGND
WDCONF
ADOUT1
Figure 2. 33912 Simplified Internal Block Diagram
33912
2
Analog Integrated Circuit Device Data
Freescale Semiconductor