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33910_10 参数 Datasheet PDF下载

33910_10图片预览
型号: 33910_10
PDF下载: 下载PDF文件 查看货源
内容描述: LIN系统基础芯片,高 [LIN System Basis Chip with High]
分类和应用:
文件页数/大小: 90 页 / 1134 K
品牌: FREESCALE [ Freescale ]
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MC33910G5AC/MC3433910G5AC  
ELECTRICAL CHARACTERISTICS  
MAXIMUM RATINGS  
Table 3. Maximum Ratings (continued)  
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or  
permanent damage to the device.  
Ratings  
Symbol  
Value  
Unit  
ESD Capability  
AECQ100  
V
Human Body Model - JESD22/A114 (C  
= 100 pF, R  
= 1500 Ω)  
ZAP  
ZAP  
V
V
V
±8.0k  
±6.0k  
±2000  
LIN Pin  
L1  
ESD1-1  
ESD1-2  
ESD1-3  
all other Pins  
Charge Device Model - JESD22/C101 (C  
= 4.0 pF)  
ZAP  
V
V
±750  
±500  
Corner Pins (Pins 1, 8, 9, 16, 17, 24, 25 and 32)  
All other Pins (Pins 2-7, 10-15, 18-23, 26-31)  
ESD2-1  
ESD2-2  
According to LIN Conformance Test Specification / LIN EMC Test  
Specification, August 2004 (C = 150 pF, R = 330 Ω)  
ZAP  
ZAP  
Contact Discharge, Unpowered  
LIN pin with 220 pF  
V
V
V
V
±20k  
±11k  
ESD3-1  
ESD3-2  
ESD3-3  
ESD3-4  
LIN pin without capacitor  
VS1/VS2 (100 nF to ground)  
L1 input (33 kΩ serial resistor)  
>±12k  
±6000  
According to IEC 61000-4-2 (C  
= 150 pF, R  
= 330 Ω)  
ZAP  
ZAP  
Unpowered  
±8000  
±8000  
±8000  
LIN pin with 220 pF and without capacitor  
VS1/VS2 (100 nF to ground)  
V
V
V
ESD4-1  
ESD4-2  
ESD4-3  
L1 input (33 kΩ serial resistor)  
THERMAL RATINGS  
Operating Ambient Temperature (8)  
T
°C  
A
33910  
34910  
-40 to 125  
-40 to 85  
Operating Junction Temperature  
Storage Temperature  
T
-40 to 150  
-55 to 150  
°C  
°C  
J
TSTG  
RθJA  
Thermal Resistance, Junction to Ambient  
°C/W  
Natural Convection, Single Layer board (1s)(8), (9)  
Natural Convection, Four Layer board (2s2p)(8), (10)  
85  
56  
Thermal Resistance, Junction to Case(11)  
RθJC  
23  
°C/W  
Peak Package Reflow Temperature During Reflow(12), (13)  
TPPRT  
Note 13  
°C  
Notes  
8. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient  
temperature, air flow, power dissipation of other components on the board, and board thermal resistance.  
9. Per JEDEC JESD51-2 with the single layer board (JESD51-3) horizontal.  
10. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.  
11. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).  
12. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may  
cause malfunction or permanent damage to the device.  
13. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow  
Temperature and Moisture Sensitivity Levels (MSL), go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and  
enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.  
33910  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
8
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