MC33910G5AC/MC3433910G5AC
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33910 was designed and developed as a highly
integrated and cost-effective solution for automotive and
industrial applications. For automotive body electronics, the
33910 is well suited to perform keypad applications via the
LIN bus.
include a Hall Sensor port supply, and one wake-up capable
pin. An internal voltage regulator provides power to a MCU
device.
Also included in this device is a LIN physical layer, which
communicates using a single wire. This enables this device
to be compatible with 3-wire bus systems, where one wire is
used for communication, one for battery, and one for ground.
Power switches are provided on the device configured as
high side outputs. Other ports are also provided, which
FUNCTIONAL PIN DESCRIPTION
See Figure 1, 33910 Simplified Application Diagram, for a
graphic representation of the various pins referred to in the
following paragraphs. Also, see Pin Connections for a
description of the pin locations in the package.
MASTER OUT SLAVE IN PIN (MOSI)
The MOSI digital pin receives SPI data from the MCU. This
data input is sampled on the negative edge of SCLK.
MASTER IN SLAVE OUT PIN (MISO)
RECEIVER OUTPUT PIN (RXD)
The MISO pin sends data to an SPI-enabled MCU. It is a
digital tri-state output used to shift serial data to the
microcontroller. Data on this output pin changes on the
positive edge of the SCLK. When CS is High, this pin will
remain in the high-impedance state.
The RXD pin is a digital output. It is the receiver output of
the LIN interface and reports the state of the bus voltage:
RXD Low when LIN bus is dominant, RXD High when LIN bus
is recessive.
TRANSMITTER INPUT PIN (TXD)
CHIP SELECT PIN (CS)
The TXD pin is a digital input. It is the transmitter input of
the LIN interface and controls the state of the bus output
(dominant when TXD is Low, recessive when TXD is High).
CS is an active low digital input. It must remain low during
a valid SPI communication and allow for several devices to
be connected in the same SPI bus without contention. A
rising edge on CS signals the end of the transmission and the
moment the data shifted in is latched. A valid transmission
must consist of 8 bits only.
This pin has an internal pull-up to force recessive state in
case the input is left floating.
LIN BUS PIN (LIN)
While in STOP mode, a low-to-high level transition on this
pin will generate a wake-up condition for the 33910.
The LIN pin represents the single-wire bus transmitter and
receiver. It is suited for automotive bus systems and is
compliant to the LIN bus specification 2.0, 2.1, and SAE
J2602-2.
ANALOG MULTIPLEXER PIN (ADOUT0)
The ADOUT0 pin can be configured via the SPI to allow
the MCU A/D converter to read the several inputs of the
Analog Multiplexer, including the VSENSE and L1 input
voltages, and the internal junction temperature.
The LIN interface is only active during Normal mode. See
Table 6, Operating Modes Overview.
SERIAL DATA CLOCK PIN (SCLK)
PWM INPUT CONTROL PIN (PWMIN)
The SCLK pin is the SPI clock input. MISO data changes
on the positive transition of the SCLK. MOSI is sampled on
the negative edge of the SCLK.
This digital input can control the high sides drivers in
Normal Request and Normal mode.
To enable PWM control, the MCU must perform a write
operation to the High Side Control Register (HSCR).
This pin has an internal 20 μA current pull-up.
33910
Analog Integrated Circuit Device Data
Freescale Semiconductor
24
FREESCALE [ Freescale ]
