PIN CONNECTIONS
PIN CONNECTIONS
AGND
HVDD
VSENSE
VDD
VS1
VS2
26
HS1
25
NC
28
31
30
29
RXD
TXD
MISO
MOSI
SCLK
CS
ADOUT0
PWMIN
1
2
3
4
5
6
7
8
* Special Configuration Recommended /
Mandatory for Marked NC Pins
27
32
24
23
22
21
20
19
18
17
HS2
L1
NC*
NC*
NC*
NC*
PGND
NC*
10
IRQ
11
12
13
14
15
16
RST
NC*
WDCONF
LGND
LIN
NC*
Figure 3. 33910 Pin Connections
Table 1. 33910 Pin Definitions
A functional description of each pin can be found in the
section beginning on
Pin
1
2
3
4
5
6
7
8
9
10
11, 15-17,
19-22, 28
Pin Name
RXD
TXD
MISO
MOSI
SCLK
CS
ADOUT0
PWMIN
RST
IRQ
NC
Formal Name
Receiver Output
Transmitter Input
SPI Output
SPI Input
SPI Clock
SPI Chip Select
Analog Output Pin 0
PWM Input
Internal Reset I/O
Internal Interrupt
Output
Definition
This pin is the receiver output of the LIN interface which reports the state of
the bus voltage to the MCU interface.
This pin is the transmitter input of the LIN interface which controls the state of
the bus output.
SPI data output. When CS is high, the pin is in the high-impedance state.
SPI data input.
SPI clock Input.
SPI chip select input pin. CS is active low.
Analog multiplexer output.
High side pulse width modulation input.
Bidirectional reset I/O pin - driven low when any internal reset source is
asserted. RST is active low.
Interrupt output pin, indicating wake-up events from Stop Mode or events from
Normal and Normal Request Modes. IRQ is active low.
No connect
NC*
9
33910
Analog Integrated Circuit Device Data
Freescale Semiconductor
3