PIN CONNECTIONS
PIN CONNECTIONS
33897/A/C/T
GND
TXD
MODE0
MODE1
RXD
NC
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
GND
NC
BUS
LOAD
VBATT
CNTL
GND
TXD
MODE0
MODE1
RXD
1
1
2
2
3
3
4
4
33897B/D
8
8
7
7
6
6
5
5
GND
BUS
LOAD
VBATT
Figure 4. 33897/A/B/C/D/T Pin Connections
Table 2. Pin Definitions
A functional description of each terminal can be found in the Functional Pin Description section, beginning on page
33897/A/C/T
Terminal
1, 7, 8, 14
33897B/D
Terminal
8
Pin Name
GND
Formal Name
Ground
Definition
Electrical Common Ground and Heat removal. A good thermal path
will also reduce the die temperature.
Data input here will appear on the BUS terminal. A logic [0] will assert
the bus, a logic [1] will make the bus go to the recessive state.
These Pins control Sleep Mode, Transmit Level, and Speed. They
have weak pulldowns.
Open drain output of the data on BUS. A recessive bus = a logic [1], a
dominant bus = logic [0]. An external pullup is required.
No internal connection to these Pins. Pin 13 can be connected to GND
to allow the use of the 14-terminal or 8-terminal device.
Provides a battery-level logic signal.
Power input. An external diode is needed for reverse battery
protection.
The external bus load resistor connects here to prevent bus pullup in
the event of loss of module ground.
This terminal connects to the bus through external components.
2
1
TXD
Transmit Data
3, 4
2, 3
MODE0,
MODE1
RXD
Mode Control
5
4
Receive Data
6, 13
–
NC
No Connect
9
10
–
5
CNTL
VBATT
Control
Battery
11
6
LOAD
Load
12
7
BUS
Bus
Notes
1. Module boards can be planned for the 14-terminal package and still use the 8-terminal package.
33897/A/B/C/D/T
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
