ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 4.75 V ≤ VDD ≤ 5.25 V, 9.0 V ≤ VPWR ≤ 17 V, -40°C ≤ TA ≤ 125°C unless otherwise
noted.
Characteristic
Symbol
Min
–
Typ
–
Max
45
–
Unit
SI Setup to Rising Edge (2.0 V) of SCLK (at 3.2 MHz)
Required Setup Time (36)
t
ns
SISU
SO Setup to SCLK Rising (2.0 V)/Falling (0.8 V) Edge
Required Setup Time (36)
t
ns
ns
ns
ns
ns
SOSU
90
–
–
SI Hold After Rising Edge (2.0 V) of SCLK (at 3.2 MHz)
Required Hold Time (36)
t
SIHOLD
–
45
–
SO Hold After SCLK Rising (2.0 V)/Falling (0.8 V) Edge
Required Hold Time (36)
t
SOHOLD
90
–
SO Rise Time
CL = 200 pF
t
t
RSO
FSO
–
–
–
50
50
SO Fall Time
CL = 200 pF
–
Falling Edge of CS (0.8 V) to SO Low-Impedance (37)
Rising Edge of CS (2.0 V) to SO High-Impedance (38)
Falling Edge of SCLK (0.8 V) to SO Data Valid
CL = 200 pF at 3.2 MHz (39)
t
–
–
–
–
110
110
ns
ns
ns
SOEN
t
SODIS
t
SOVALID
–
–
65
–
80
CS Rising Edge to Next Falling Edge (36)
Xfer DELAY
1.0
μs
Notes
36. Parameter is not tested and values suggested are for system design consideration only in preventing the occurrence of double pulsing.
37. Enable time required for SO. Pull-up resistor = 10 kΩ.
38. Disable time required for SO. Pull-up resistor = 10 kΩ.
39. Time required to obtain valid data out of SO following the falling edge of SCLK.
33882
Analog Integrated Circuit Device Data
Freescale Semiconductor
12
FREESCALE [ Freescale ]
