PIN CONNECTIONS
Table 2. 33879 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page 14.
Pin
Pin Number Pin Name
Formal Name
Definition
Function
Output
Output
Output
Output
Output
Output
Output
Input
Output 5 MOSFET drain pin.
Output 3 MOSFET drain pin.
Output 3 MOSFET source pin.
Output 4 MOSFET drain pin.
Output 4 MOSFET source pin.
Output 7 MOSFET drain pin.
Output 7 MOSFET source pin.
21
22
23
26
27
28
29
31
D5
D3
Drain Output 5
Drain Output 3
Source Output 3
Drain Output 4
Source Output 4
Drain Output 7
Source Output 7
Battery Input
S3
D4
S4
D7
S7
Power supply pin to the 33879. VPWR has internal reverse battery
protection.
VPWR
SPI control data output pin from the 33879 to the MCU. DO=0 no fault,
DO=1 specific output has fault.
32
33
DO
EP
Output
Serial Data Output
Exposed Pad
Device will perform as specified with the Exposed Pad un-terminated
(floating) however, it is recommended that the Exposed Pad be terminated
to pin 1 (GND) and system ground.
Ground
33879
Analog Integrated Circuit Device Data
Freescale Semiconductor
5