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33874_08 参数 Datasheet PDF下载

33874_08图片预览
型号: 33874_08
PDF下载: 下载PDF文件 查看货源
内容描述: 四通道高边开关 [Quad High Side Switch]
分类和应用: 开关
文件页数/大小: 38 页 / 1963 K
品牌: FREESCALE [ Freescale ]
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ELECTRICAL CHARACTERISTICS  
DYNAMIC ELECTRICAL CHARACTERISTICS  
DYNAMIC ELECTRICAL CHARACTERISTICS  
Table 4. Dynamic Electrical Characteristics  
Characteristics noted under conditions 6.0V VPWR 27V, 4.5V VDD 5.5V, -40°C TA 125°C, GND = 0V, unless  
otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless  
otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
POWER OUTPUT TIMING (HS0, HS1, HS2, HS3)  
Output Rising Slow Slew Rate A (DICR D3 = 0)(19)  
SR  
V/μs  
V/μs  
V/μs  
V/μs  
V/μs  
V/μs  
V/μs  
V/μs  
μs  
RA_SLOW  
SR  
RB_SLOW  
9.0V < V  
< 16V  
0.1  
0.015  
0.5  
0.3  
0.05  
1.5  
0.3  
0.3  
0.05  
1.5  
0.3  
30  
0.75  
0.15  
3.0  
PWR  
Output Rising Slow Slew Rate B (DICR D3 = 0)(20)  
9.0V < V < 16V  
PWR  
Output Rising Fast Slew Rate A (DICR D3 = 1)(19)  
SR  
SR  
SR  
RA_FAST  
RB_FAST  
9.0V < V < 16V  
PWR  
Output Rising Fast Slew Rate B (DICR D3 = 1)(20)  
9.0V < V < 16V  
0.025  
0.1  
1.0  
PWR  
Output Falling Slow Slew Rate A (DICR D3 = 0)(19)  
FA_SLOW  
FB_SLOW  
9.0V < V < 16V  
0.75  
0.15  
3.0  
PWR  
Output Falling Slow Slew Rate B (DICR D3 = 0)(20)  
SR  
9.0V < V < 16V  
0.015  
0.5  
PWR  
Output Falling Fast Slew Rate A (DICR D3 = 1)(19)  
SR  
FA_FAST  
FB_FAST  
9.0V < V < 16V  
PWR  
Output Falling Fast Slew Rate B (DICR D3 = 1)(20)  
SR  
9.0V < V < 16V  
0.025  
2.0  
1.0  
PWR  
Output Turn-ON Delay Time in Slow Slew Rate(21)  
t
DLY_SLOW(ON)  
DICR = 0  
200  
100  
800  
400  
Output Turn-ON Delay Time in Fast Slew Rate(21)  
t
μs  
DLY_FAST(ON)  
DICR = 1  
1.0  
6.0  
200  
50  
Output Turn-OFF Delay Time in Slow Slew Rate Mode(22)  
tDLY_SLOW(OF  
μs  
F)  
DICR = 0  
40  
Output Turn-OFF Delay Time in Fast Slew Rate Mode(22)  
tDLY_FAST(OFF)  
μs  
DICR = 1  
20  
Over-current Low Detection Blanking Time  
OCLT[1:0]: 00  
ms  
tOCL0  
tOCL1  
tOCL2  
tOCL3  
108  
155  
202  
OCLT[1:0]: 01(23)  
OCLT[1:0]: 10  
55  
75  
95  
0.3  
OCLT[1:0]: 11  
0.08  
0.15  
Notes  
19. Rise and Fall Slew Rates A measured across a 5.0Ω resistive load at high side output = 0.5V to V  
These parameters are guaranteed by process monitoring.  
-3.5V (see Figure 4, page 12).  
-3.5V (see Figure 4). These  
PWR  
PWR  
20. Rise and Fall Slew Rates B measured across a 5.0Ω resistive load at high side output = 0.5V to V  
parameters are guaranteed by process monitoring.  
21. Turn-ON delay time measured from rising edge of any signal (IN[0:3], SCLK, CS) that would turn the output ON to V  
= 0.5V with  
HS[0:3]  
R = 5.0Ω resistive load.  
L
22. Turn-OFF delay time measured from falling edge of any signal (IN[0:3], SCLK, CS) that would turn the output OFF to V  
= V  
-
PWR  
HS[0:3]  
0.5V with R = 5.0Ω resistive load.  
L
23. This logical bit is not defined. Do not use.  
33874  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
10  
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