ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
TXD
Recessive State
V
t
(MAX)
REC
REC
LIN
74.4% V
SUP
58.1% V
SUP
t
(MIN)
DOM
40% V
60% V
SUP
SUP
42.2% V
SUP
28.4% V
SUP
V
DOM
t
(MAX)
DOM
Dominant State
t
(MIN)
REC
RXD
t
t
RH
RL
Figure 4. Normal Mode Bus Timing Characteristics
TXD
Recessive State
t
(MAX)
REC
V
REC
LIN
77.8% V
SUP
61.6% V
SUP
t
(MIN)
DOM
60% V
40% V
SUP
SUP
38.9% V
SUP
25.1% V
SUP
V
t
(MAX)
DOM
DOM
Dominant State
t
(MIN)
REC
RXD
t
t
RH
RL
Figure 5. Slow Mode Bus Timing Characteristics
V
SUP
VSUP
TXD
R0
LIN
RXD
GND
C0
Note R0 and C0: 1.0 kΩ/1.0 nF, 660 Ω/6.8 nF, and 500 Ω/10 nF.
Figure 6. Test Circuit for Timing Measurements
33661
Analog Integrated Circuit Device Data
Freescale Semiconductor
9