ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
t
t
t
WCKL
t
SSB
WCKH
HCK
SCKIN
t
t
H
S
A2
DATA
STRB
D0
A3
t
WSB
Figure 5. Serial Interface Timing Diagrams
DATA1
Table 5. Serial Interface Functions
Register Name Address
DATA2
0 CLEAR, SLEEP 1000
CLEAR
PSW1
SLEEP
PSW2
Reserved
PGOOD1
Reserved
VOUT2
Reserved
SREG1
Reserved
SREG2
Reserved
SREG3
Reserved
PGOOD2
1
2
3
4
5
6
7
Power Mode
Clock Select
VO1_SENSE
VO2_SENSE
SREG1
0001
0010
0011
0100
0101
0110
0111
Ext / Int Half Freq RSTB sleep S_Off_VGATE VG_Duty[3] VG_Duty[2] VG_Duty[1]
VG_Duty[0]
S_Off_VO1_SENSE
S_Off_VO2_SENSE
Reserved
MSB
MSB
MSB
MSB
MSB
VO1_SENSE Output Voltage
VO2_SENSE Output Voltage
SREG1 Output Voltage
LSB
LSB
LSB
SREG2
SREG2 Output Voltage
LSB
SREG3
SREG3 Output Voltage
LSB
CP Off
EXTG On
Twelve bits immediately before start-up of STRB are
always effective. Upon power on, the internal power on reset
works to initialize the registers. Serial data is fetched in the
order of Add_[3], Add_[2], ..., Add_[0], DATA1_[3],
DATA1_[2], ...., DATA2_[0].
Table 6. Block Operation
INPUT
OUTPUT
WAKE
(Int)
PGOOD1
(Int)
REG
1,2,3
PGOOD1
PGOOD2(Int)
SEQ_SELECT
VGATE
VO1_SENSE
VO2_SENSE
VOUT1,2
L
X
L
X
L
X
L
X
L
-
-
-
-
-
-
-
-
H
H
H
H
H
O
O
O
O
O
O
O
O
O
O
H
H
H
H
L
L
L
-
-
O
-
L
L
H
L
-
-
H
H
H
H
O
O
O
O
O
O
H
O : Operation, - : Stop, X : Don’t care
18730
Analog Integrated Circuit Device Data
Freescale Semiconductor
12
FREESCALE [ Freescale ]
