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1500457 参数 Datasheet PDF下载

1500457图片预览
型号: 1500457
PDF下载: 下载PDF文件 查看货源
内容描述: 综合主机处理器的硬件规格 [Integrated Host Processor Hardware Specifications]
分类和应用:
文件页数/大小: 87 页 / 680 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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System Design Information
The Bergquist Company
18930 West 78th St.
Chanhassen, MN 55317
Internet: www.bergquistcompany.com
800-347-4572
20.3
Heat Sink Attachment
When heat sinks are attached, an interface material is required, preferably thermal grease and a spring clip.
The spring clip should connect to the printed-circuit board, either to the board itself, to hooks soldered to
the board, or to a plastic stiffener. Avoid attachment forces that can lift the edge of the package or peel the
package from the board. Such peeling forces reduce the solder joint lifetime of the package. The
recommended maximum force on the top of the package is 10 lb force (4.5 kg force). Any adhesive
attachment should attach to painted or plastic surfaces, and its performance should be verified under the
application requirements.
20.3.1
Experimental Determination of the Junction Temperature with a
Heat Sink
When a heat sink is used, the junction temperature is determined from a thermocouple inserted at the
interface between the case of the package and the interface material. A clearance slot or hole is normally
required in the heat sink. Minimize the size of the clearance to minimize the change in thermal
performance caused by removing part of the thermal interface to the heat sink. Because of the experimental
difficulties with this technique, many engineers measure the heat sink temperature and then back calculate
the case temperature using a separate measurement of the thermal resistance of the interface. From this
case temperature, the junction temperature is determined from the junction-to-case thermal resistance.
T
J
=
T
C
+ (R
θ
JC
×
P
D
)
where:
T
J
= junction temperature (°C)
T
C
= case temperature of the package (°C)
R
θ
JC
= junction-to-case thermal resistance (°C/W)
P
D
= power dissipation (W)
21 System Design Information
This section provides electrical and thermal design recommendations for successful application of the
MPC8349EA.
21.1
System Clocking
The MPC8349EA includes two PLLs:
1. The platform PLL generates the platform clock from the externally supplied CLKIN input. The
frequency ratio between the platform and CLKIN is selected using the platform PLL ratio
configuration bits as described in
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
79