INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
Charger Interface and Control:
4 bit DAC, Clamp, Protection,
Trickle Generation
Battery Interface &
Protection
PWGTDRV1
Tri-Color
LED Drive
Backlight
LED Drive
PWR Gate
Drive & Chg
Pump
PWGTDRV2
LICELL, UID, Die Temp, GPO4
Voltage /
Current
Sensing &
Translation
GNDADC
SW1IN
O/P
Drive
SW1OUT
GNDSW1
SW1FB
SW1
1050 mA
Buck
ADIN5
ADIN6
SW2IN
ADIN7
TSX1
O/P
Drive
SW2OUT
GNDSW2
SW2FB
10 Bit GP
ADC
A/D Result
SW2
800 mA
Buck
MUX
TSX2
TSY1
SW3IN
A/D
Control
Touch
Screen
Interface
O/P
Drive
SW3OUT
GNDSW3
SW3FB
SW3
800 mA
Buck
TSY2
Trigger
Handling
Die Temp &
Thermal Warning
Detection
To Interrupt
Section
TSREF
SW4IN
ADTRIG
O/P
Drive
SW4OUT
GNDSW4
SW4FB
SW4
800 mA
Buck
BATTISNSCC
CFP
BATT
Coulomb
Counter
DVS1
DVS2
CCOUT
DVS
CONTROL
To SPI
CFM
Package Pin Legend
SWBSTIN
SWBSTOUT
O/P
Output Pin
SWBST
300 mA
Boost
Drive
MC13892
IC
SWBSTFB
GNDSWBST
Input Pin
SPIVCC
Shift Register
Bi-directional Pin
CS
SPI
Interface
+
Muxed
I2C
CLK
SPI
To Enables & Control
MOSI
MISO
SPI Control
Registers
VVIDEODRV
VVIDEO
Optional
Interface
VVIDEO
VUSB2
GNDSPI
Shift Register
VINUSB2
VUSB2
Pass
FET
VINAUDIO
VAUDIO
VCORE
Pass
FET
VAUDIO
MC13892
VCOREDIG
Reference
Generation
REFCORE
GNDCORE
VINIOHI
VIOHI
Pass
FET
VIOHI
VPLL
VINPLL
VPLL
Pass
FET
VINDIG
VDIG
Pass
FET
UID
VDIG
VBUS/ID
Detectors
UVBUS
VINCAMDRV
Pass
FET
VCAM
VCAM
VSDDRV
VSD
VSD
VBUSEN
OTG
5V
To
Trimmed
Circuits
SPI
VGEN1DRV
VGEN1
Trim-In-Package
VUSB
Regulator
VGEN1
Control
Logic
VINUSB
VUSB
VGEN2DRV
VGEN2
VGEN2
VGEN3
Startup
Sequencer
Decode
Trim?
Control
Logic
PUMS
PLL
VINGEN3DRV
VGEN3
Switchers
Pass
FET
Monitor
Timer
BP
LCELL
Switch
RTC +
Calibration
32 KHz
Internal
Osc
LICELL
SPI Result
Registers
Interrupt
Inputs
Enables &
Control
Li Cell
Charger
32 KHz
Buffers
Best
of
GNDREG1
Supply
GNDREG2
GNDREG3
GPO
Control
32 KHz
Crystal
Osc
Core Control Logic, Timers, & Interrupts
VSRTC
Figure 2. 13892 Simplified Internal Block Diagram
13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
FREESCALE [ Freescale ]
