SPI BITMAP
Table 139. Register 27, Switchers 3
Name
Unused
Bit #
R/W
Reset
Default
Description
15
16
17
18
19
20
21
22
23
R
R
0
0
0
0
0
0
0
0
*
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SW4HI
R
R
Not available
R
R
R
R
R/W
NONE
SW4 output range selection
Table 140. Register 28, Switchers 4
Name
Bit #
R/W
Reset
Default
Description
SW1MODE0
SW1MODE1
SW1MODE2
SW1MODE3
SW1MHMODE
SW1UOMODE
SW1DVSSPEED0
SW1DVSSPEED1
SIDEN
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
RESETB
RESETB
RESETB
RESETB
OFFB
0
1
0
1
0
0
1
0
0
0
0
1
0
1
0
0
1
0
0
0
0
1
0
0
SW1 operating mode
2
3
4
SW1 Memory Hold mode
SW1 User Off mode
5
OFFB
6
RESETB
RESETB
RESETB
SW1 DVS speed setting
7
8
SID mode enable
For future use
Reserved
9
SW2MODE0
SW2MODE1
SW2MODE2
SW2MODE3
SW2MHMODE
SW2UOMODE
SW2DVSSPEED0
SW2DVSSPEED1
PLLEN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
RESETB
RESETB
RESETB
RESETB
OFFB
SW2 operating mode
SW2 Memory Hold mode
SW2 User Off mode
OFFB
RESETB
RESETB
RESETB
RESETB
RESETB
RESETB
RESETB
SW2 DVS speed setting
Switcher PLL enable
PLLX0
PLLX1
Switcher PLL multiplication factor
PLLX2
SWILIMB
Switcher current limit disable
For future use
Reserved
Notes
85. SWxMODE[3:0] bits will be reset to their default values by the startup sequencer based on PUMS settings. An enabled switcher will
default to PWM mode (no pulse skipping) for both Normal and Standby operation.
Table 141. Register 29, Switchers 5
Name
Bit #
R/W
Reset
Default
Description
SW3MODE0
SW3MODE1
SW3MODE2
SW3MODE3
SW3MHMODE
SW3UOMODE
0
1
2
3
4
5
R/W
R/W
R/W
R/W
R/W
R/W
RESETB
RESETB
RESETB
RESETB
OFFB
0
1
0
1
0
0
SW3 operating mode
SW3 Memory Hold mode
SW3 User Off mode
OFFB
13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
137
FREESCALE [ Freescale ]
