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FSP33035ND 参数 Datasheet PDF下载

FSP33035ND图片预览
型号: FSP33035ND
PDF下载: 下载PDF文件 查看货源
内容描述: 直流无刷电机控制器 [BRUSHLESS DC MOTOR CONTROLLER]
分类和应用: 电动机控制电机控制器
文件页数/大小: 28 页 / 1622 K
品牌: FOSLINK [ FOSLINK SEMICONDUCTOR CO.,LTD ]
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BRUSHLESS DC MOTOR CONTROLLER  
FSP33035  
Current Limit  
Continuous operation of a motor that is severely over–loaded results in overheating and eventual failure. This  
destructive condition can best be prevented with the use of cycle–by–cycle current limiting. That is, each on–cycle  
is treated as a separate event. Cycle–by–cycle current limiting is accomplished by monitoring the stator current  
build–up each time an output switch conducts, and upon sensing an over current condition, immediately turning off  
the switch and holding it off for the remaining duration of oscillator ramp–up period. The stator current is converted  
to a voltage by inserting a ground–referenced sense resistor RS in series with the three bottom switch transistors  
(Q4, Q5, Q6). The voltage developed across the sense resistor is monitored by the Current Sense Input (Pins 9 and  
15), and compared to the internal 100 mV reference. The current sense comparator inputs have an input common  
mode range of approximately 3.0 V. If the 100 mV current sense threshold is exceeded, the comparator resets the  
lower sense latch and terminates output switch conduction. The value for the current sense resistor is:  
The Fault output activates during an over current condition. The dual–latch PWM configuration ensures that only  
one single output conduction pulse occurs during any given oscillator cycle, whether terminated by the output of the  
error amp or the current limit comparator.  
Reference voltage source  
The on–chip 6.25 V regulator (Pin 8) provides charging current for the oscillator timing capacitor, a reference for the  
error amplifier, and can supply 20 mA of current suitable for directly powering sensors in low voltage applications. In  
higher voltage applications, it may become necessary to transfer the power dissipated by the regulator off the IC.  
This is easily accomplished with the addition of an external pass transistor as shown in Figure below. A 6.25 V  
reference level was chosen to allow implementation of the simpler NPN circuit, where Vref – VBE exceeds the  
minimum voltage required by Hall Effect sensors over temperature. With proper transistor selection and adequate  
heatsinking, up to one amp of load current can be obtained.  
Reference Output Buffers  
The NPN circuit is recommended for powering Hall or opto sensors, where the output voltage temperature  
coefficient is not critical. The PNP circuit is slightly more complex, but is also more accurate over temperature.  
Neither circuit has current limiting.  
Undervoltage Lockout  
A triple Undervoltage Lockout has been incorporated to prevent damage to the IC and the external power switch  
transistors. Under low power supply conditions, it guarantees that the IC and sensors are fully functional, and that  
there is sufficient bottom drive output voltage. The positive power supplies to the IC (VCC) and the bottom drives  
(VC) are each monitored by separate comparators that have their thresholds at 9.1 V. This level ensures sufficient  
gate drive necessary to attain low RDS(on) when driving standard power MOSFET devices. When directly powering  
the Hall sensors from the reference, improper sensor operation can result if the reference output voltage falls below  
4.5 V. A third comparator is used to detect this condition. If one or more of the comparators detects an undervoltage  
condition, the Fault Output is activated, the top drives are turned off and the bottom drive outputs are held in a low  
state. Each of the comparators contains hysteresis to prevent oscillations when crossing their respective  
thresholds.  
9/28  
2007-3-16  
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