F81867
GPIO1x
PIN STATUS
S0 S3
Register
Power
Well
Pin
Power
Well
Register
Reset Signal
Pin
Name
G3 -> S5
S5
65
66
67
68
69
70
71
72
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
Z
Z
Z
Z
Z
Z
Z
Z
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
GPIO2x
PIN STATUS
S0 S3
Register
Power
Well
Pin
Power
Well
Register
Reset Signal
Pin
Name
G3 -> S5
S5
76
77
78
79
80
81
82
83
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
Z
Z
Z
Z
Z
Z
L
L
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
user define user define user define I_VSB3V
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
VBAT
VBAT
* GPIO26 and GPIO27 have no push pull function.
GPIO3x
PIN STATUS
Register
Power
Well
Pin
Power
Well
Register
Reset Signal
Pin
Name
G3 -> S5
S0
S3
S5
36
37
38
39
40
41
42
43
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
Z
Z
Z
Z
Z
Z
Z
Z
user define
user define
user define
user define
user define
user define
user define
user define
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
I_VSB3V
LRESET#
LRESET#
LRESET#
LRESET#
LRESET#
LRESET#
LRESET#
LRESET#
3VCC
3VCC
3VCC
3VCC
3VCC
3VCC
3VCC
3VCC
92
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
