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F81866A 参数 Datasheet PDF下载

F81866A图片预览
型号: F81866A
PDF下载: 下载PDF文件 查看货源
内容描述: 6个UART超级IO 128字节FIFO和电源 [6 UARTs Super IO With 128 Bytes FIFO and Power]
分类和应用: 先进先出芯片
文件页数/大小: 210 页 / 1806 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F81866A  
*GPIO2 Data Port Index 08h  
Bit  
Name  
R/W Reset Default  
Description  
GPIO2 Data Control, this byte is available when GPIODEC_RANGE is set.  
Write data to this byte will change the value of GPIO20_VAL ~ GPIO27_VAL  
in configuration register as writing data to index 0xD1.  
7-0  
GPIO2_DATA  
R/W 5VSB  
-
Read data from this byte will read the pin status of GPIO20_IN ~ GPIO27_IN  
as the value in index 0xD2  
*GPIO3 Data Port Index 09h  
Bit  
Name  
R/W Reset Default  
Description  
GPIO3 Data Control, this byte is available when GPIODEC_RANGE is set.  
Write data to this byte will change the value of GPIO30_VAL ~ GPIO37_VAL  
in configuration register as writing data to index 0xC1.  
7-0  
GPIO3_DATA  
R/W LRESET#  
-
Read data from this byte will read the pin status of GPIO30_IN ~ GPIO37_IN  
as the value in index 0xC2  
GPIO4 Data Port Index 0Ah  
Bit  
Name  
R/W Reset Default  
Description  
GPIO4 Data Control, this byte is available when GPIODEC_RANGE is set.  
Write data to this byte will change the value of GPIO40_VAL ~ GPIO47_VAL  
in configuration register as writing data to index 0xB1.  
7-0  
GPIO4_DATA  
R/W LRESET#  
-
Read data from this byte will read the pin status of GPIO40_IN ~ GPIO47_IN  
as the value in index 0xB2  
6.6.2 GPIOxx status  
Z means high impendence.  
If the external circuit is pull high then the pin status is "H"; else if the external circuit is pull low then the pin  
status is "L".  
User define means by programming the configure register.  
6.6.2.1GPIO0x  
PIN STATUS  
S0 S3  
Register  
Power  
Well  
Pin  
Power  
Well  
Register  
Reset Signal  
Pin  
Name  
G3 -> S5  
S5  
52  
53  
54  
55  
56  
57  
58  
59  
GPIO00  
GPIO01  
GPIO02  
GPIO03  
GPIO04  
GPIO05  
GPIO06  
GPIO07  
L
L
Z
L
Z
Z
Z
Z
user define user define user define I_VSB3V  
user define user define user define I_VSB3V  
user define user define user define I_VSB3V  
user define user define user define I_VSB3V  
user define user define user define I_VSB3V  
user define user define user define I_VSB3V  
user define user define user define I_VSB3V  
user define user define user define I_VSB3V  
5VSB  
5VSB  
5VSB  
5VSB  
5VSB  
5VSB  
5VSB  
5VSB  
I_VSB3V  
I_VSB3V  
I_VSB3V  
I_VSB3V  
I_VSB3V  
I_VSB3V  
I_VSB3V  
I_VSB3V  
90  
Jan, 2012  
V0. 12P  
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