F81866A
FAN1 SEGMENT 3 SPEED COUNT Register – Index ACh
Bit
Name
R/W Reset Default
Description
The meaning of this register is depending on the FAN1_MODE(CR96)
2’b00: The value that set in this byte is the relative expect fan speed % of
the full speed in this temperature section.
B2h
7-0
SEC3SPEED1
R/W
5VSB
(70%)
2’b01: The value that set in this byte is mean the expect PWM duty-cycle
in this temperature section.
FAN1 SEGMENT 4 SPEED COUNT Register – Index ADh
Bit
Name
R/W Reset Default
Description
The meaning of this register is depending on the FAN1_MODE(CR96)
2’b00: The value that set in this byte is the relative expect fan speed % of
the full speed in this temperature section.
99h
7-0
SEC4SPEED1
R/W
5VSB
(60%)
2’b01: The value that set in this byte is mean the expect PWM duty-cycle
in this temperature section.
FAN1 SEGMENT 5 SPEED COUNT Register – Index AEh
Bit
Name
R/W Reset Default
Description
The meaning of this register is depending on the FAN1_MODE(CR96)
2’b00: The value that set in this byte is the relative expect fan speed % of
the full speed in this temperature section.
80h
7-0
SEC5PEED1
R/W
5VSB (50%)
2’b01: The value that set in this byte is mean the expect PWM duty-cycle
in this temperature section.
FAN1 Temperature Mapping Select – Index AFh
Bit
Name
R/W Reset Default
Description
This bit companies with FAN1_TEMP_SEL select the temperature source
for controlling FAN1.
FAN1_TEMP
_SEL_DIG
7
R/W
5VSB
0
This bit and FREQ_SEL_ADD1 are used to select FAN1 PWM frequency.
NEW_FREQ_SEL1 = { FREQ_SEL_ADD1, FAN1_PWM_FREQ_SEL}
FAN1_PWM
_FREQ_SEL
00: 23.5 KHz
6
5
R/W
R/W
5VSB
5VSB
0
0
01: 11.75 KHz
10: 5.875 KHz
11: 220 Hz
FAN1_UP_T_EN
Set 1 to force FAN1 to full speed if any temperature over its high limit.
76
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
