F81866A
FAN BEEP# Enable Register ⎯ Index 93h
Bit
Name
R/W Reset Default
Description
7
Reserved
-
-
Reserved
-
FULL_WITH_
T2_EN
6
5
R/W 5VSB
R/W 5VSB
0
Set one will enable FAN to force full speed when T2 over high limit.
Set one will enable FAN to force full speed when T1 over high limit.
FULL_WITH_
T1_EN
0
4
3
2
1
0
Reserved
-
-
-
-
-
Reserved
Reserved
-
Reserved.
EN_FAN3_ BEEP
EN_FAN2_ BEEP
EN_FAN1_ BEEP
R/W 5VSB
R/W 5VSB
R/W 5VSB
0
0
0
A one enables the corresponding interrupt status bit for BEEP.
A one enables the corresponding interrupt status bit for BEEP.
A one enables the corresponding interrupt status bit for BEEP.
FAN Type Select Register ⎯ Index 94h (FAN_PROG_SEL = 0)
Bit
Name
R/W Reset Default
Description
7-6
Reserved
-
-
Reserved.
-
00: Output PWM mode (push pull) to control fans.
01: Use linear fan application circuit to control fan speed by fan’s power
terminal.
10: Output PWM mode (open drain) to control Intel 4-wire fans.
11: Reserved.
5-4
FAN3_TYPE
R/W 3VCC
00
Bit 0 is power on trap by FANCTL3
0: FANCTL3 is pull up by external resistor.
1: FANCTL3 is pull down by internal 100K Ω resistor.
00: Output PWM mode (push pull) to control fans.
01: Use linear fan application circuit to control fan speed by fan’s power
terminal.
10: Output PWM mode (open drain) to control Intel 4-wire fans.
11: Reserved.
3-2
FAN2_TYPE
R/W 3VCC
00
Bit 0 is power on trap by FANCTL2
0: FANCTL2 is pull up by external resistor.
1: FANCTL2 is pull down by internal 100K Ω resistor.
66
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
