F81866A
0: Disable SMI event.
6
5
4
3
2
1
0
GPIO16_SMI_EN
GPIO15_SMI_EN
GPIO14_SMI_EN
GPIO13_SMI_EN
GPIO12_SMI_EN
GPIO11_SMI_EN
GPIO10_SMI_EN
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
0
0
0
0
0
0
0
1: Enable SMI event via PME# or SIRQ if GPIO16_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO15_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO14_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO13_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO12_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO11_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO10_SMI_ST is set.
7.7.5.6GPIO1 SMI Status Register ⎯ Index E9h
Bit
Name
R/W Reset Default
Description
0: No SMI event.
7
GPIO17_SMI_ST
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
0
0
0
0
0
0
0
0
1: A SMI event will set if GPIO17 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
6
5
4
3
2
1
0
GPIO16_SMI_ST
GPIO15_SMI_ST
GPIO14_SMI_ST
GPIO13_SMI_ST
GPIO12_SMI_ST
GPIO11_SMI_ST
GPIO10_SMI_ST
1: A SMI event will set if GPIO16 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO15 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO14 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO13 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO12 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO11 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO10 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
150
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
