F75113
8.2.12 GPIO3X Edge Detector Status Register ⎯ Index 49h
Bit
Name
R/W Default
Description
Indicate GPIO37 Edge Status. If set to 1, the edge of GPIO37
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
7
STS_GP37EDGE
R
R
R
R
R
R
R
R
-
-
-
-
-
-
-
-
Indicate GPIO36 Edge Status. If set to 1, the edge of GPIO36
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
6
5
4
3
2
1
0
STS_GP36EDGE
STS_GP35EDGE
STS_GP34EDGE
STS_GP33EDGE
STS_GP32EDGE
STS_GP31EDGE
STS_GP30EDGE
Indicate GPIO35 Edge Status. If set to 1, the edge of GPIO35
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
Indicate GPIO34 Edge Status. If set to 1, the edge of GPIO34
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
Indicate GPIO33 Edge Status. If set to 1, the edge of GPIO33
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
Indicate GPIO32 Edge Status. If set to 1, the edge of GPIO32
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
Indicate GPIO31 Edge Status. If set to 1, the edge of GPIO31
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
Indicate GPIO30 Edge Status. If set to 1, the edge of GPIO30
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
8.2.13 GPIO3X SMI Enable Register ⎯ Index 4Ah
Bit
Name
R/W Default
Description
Enable GPIO37 SMI Generation. If this bit set to 1, enable
GPIO37 to generate SMI.
7
EN_GP37SMI
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
Enable GPIO36 SMI Generation. If this bit set to 1, enable
GPIO36 to generate SMI.
6
5
4
3
EN_GP36SMI
EN_GP35SMI
EN_GP34SMI
EN_GP33SMI
Enable GPIO35 SMI Generation. If this bit set to 1, enable
GPIO35 to generate SMI.
Enable GPIO34 SMI Generation. If this bit set to 1, enable
GPIO34 to generate SMI.
Enable GPIO33 SMI Generation. If this bit set to 1, enable
GPIO33 to generate SMI.
- 59 -
Dec,2011
V0.13P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
