Feature Integration Technology Inc.
Fintek
F72603R
6.4 Charge Pump
PIN NO
25
PIN NAME
CHRPMP
TYPE
P
PWR
DESCRIPTION
VSB9V Charge pump output (9V nominal). Decouple this pin with 1uF ceramic capacitor
VSB9V Positive end of charge pump capacitor
26
C2
C1
AIN
27
AOUT
VSB9V Negative end of charge pump capacitor. Connect a 1uF ceramic capacitor
between pin27 (-) and pin26(+)
6.5 Power LED
PIN NO
12
PIN NAME
TYPE
OD24
OD24
PWR
DESCRIPTION
SLED
PLED
VSB5V Suspend LED. Can be programmed by setting register
VSB5V Power LED. Can be programmed by setting register
13
6.6 Control Signal and Others
PIN NO
PIN NAME
SDA
TYPE
I/OD12
INts
PWR
DESCRIPTION
9
VSB5V 2-wire serial bus data. Leakage free.
10
14
SCL
VSB5V 2-wire serial bus clock. Leakage free.
PS_ON#
VSB5V Schmitt trigger input. Connect to ATX power. While connecting an inverter
between this pin and ATX power, this pin will act as S3# input.
VSB5V ACPI control signal governing the Soft Off state S5(Low active)
VSB5V Soft-Start. Connect this pin to a small ceramic capacitor to determine the
soft-start rate. The value of capacitor is bigger, the slew rate is slower.
VSB5V Provide 1.25V reference voltage. As for VREF over-voltage, please refer to
register description (Index 05h)
INts
15
17
S5IN#
SS
INts
AIN
28
VREF
AOUT
-5 -
Apr 2004
V0.36
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
