Feature Integration Technology Inc.
Fintek
F72603R
5. Block Diagram
VSB
SLOTRST#
DEVICERST#
HDDRST#
PCIRSTIN#
PWOKIN1
PWOKIN2
PWOKOUT
SDA
VREF
VREF
C1
Reset Circuit
C2
Charge
Pump
Control
Circuit
CP
DUALGATE
VCCGATE
USBGATE
STRGATE
LR_DRV
GND
Control
circuit
PWOK
Circuit
Osc
Control Register
SCL
Linear
Regulator
I2C Interface
LED
GND
LR_SEN
SS
SLED
Control
Circuit
PLED
RSMRST#
S5IN#
PS_ON#
6. Pin Descriptions
I/O12t
I/O12ts
O12
- TTL level bi-directional pin with 12 mA source-sink capability
- TTL level and schmitt trigger
- Output pin with 12 mA source-sink capability
- Output pin with 24 mA source-sink capability, output 4V
O24V4
AOUT - Output pin(Analog)
OD12
INt
- Open-drain output pin with 12 mA sink capability
- TTL level input pin
INts
AIN
- TTL level input pin and schmitt trigger
- Input pin(Analog)
-3 -
Apr 2004
V0.36
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
