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F71862FG 参数 Datasheet PDF下载

F71862FG图片预览
型号: F71862FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 110 页 / 837 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71862  
cause the FAN_FAULT# event.  
(1). When PWM_Duty reaches 0xFF, the fan speed count can’t reach the fan expected  
count in time. (Figure 7-11)  
11 sec(default)  
Current Fan Count  
Expected Fan Count  
100%  
Duty-cycle  
Fan_Fault#  
Fig 7-11  
(2). After the period of detecting fan full speed, when PWM_Duty > Min. Duty, and fan  
count still in 0xFFF.  
Before the device registers, the following is a register map order which shows a summary of  
all registers. Please refer each one register if you want more detail information.  
Register CR01 ~ CR03 Æ Configuration Registers  
Register CR10 ~ CR4F Æ Voltage Setting Register  
Register CR60 ~ CR8E Æ Temperature Setting Register  
Register CR90 ~ CRDF Æ Fan Control Setting Register  
ÆFan1 Detail Setting CRA0 ~ CRAF  
ÆFan2 Detail Setting CRB0 ~ CRBF  
ÆFan3 Detail Setting CRC0 ~ CRCF  
Configuration Registers  
Configuration Register Index 01h  
Bit  
7-3  
2
Name  
Reserved  
R/W Default  
Description  
Reserved  
0h  
0
0
1
Hardware monitor function power down.  
POWER_DOWN  
R/W  
Set one to enable startup of fan monitoring operations; a zero puts the part  
in standby mode.  
Set one to enable startup of temperature and voltage monitoring  
operations; a zero puts the part in standby mode.  
1
0
FAN_START  
V_T_START  
R/W  
R/W  
1
Configuration Register Index 02h  
Bit  
Name  
R/W Default  
Description  
Dummy register.  
7
Reserved  
R/W  
R/W  
0
0
0: Disable case open event output via BEEP.  
1: Enable case open event output via BEEP.  
6
CASE_BEEP_EN  
49  
July, 2008  
V.28P  
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