F71862
controller's input buffer only if the input buffer full bit in the status register is “0”.
Status Register
The status register is an 8-bit read-only register at I/O address 64H, that holds
information about the status of the keyboard controller and interface. It may be read at any
time.
BIT
BIT FUNCTION
DESCRIPTION
0
Output Buffer Full
0: Output buffer empty
1: Output buffer full
1
2
Input Buffer Full
System Flag
0: Input buffer empty
1: Input buffer full
This bit may be set to 0 or 1 by writing to the system flag bit in the
command byte of the keyboard controller (KCCB). It defaults to
0 after a power-on reset.
3
4
5
6
7
Command/Data
Inhibit Switch
0: Data byte
1: Command byte
0: Keyboard is inhibited
1: Keyboard is not inhibited
Mouse Output Buffer
0: Muse output buffer empty
1: Mouse output buffer full
0: No time-out error
1: Time-out error
General Purpose
Time-out
Parity Error
0: Odd parity
1: Even parity (error)
Commands
COMMAND
20h
FUNCTION
Read Command Byte
Write Command Byte
60h
BIT
DESCRIPTION
0
Enable Keyboard Interrupt
Enable Mouse Interrupt
System flag
1
2
3
Reserve
4
Disable Keyboard Interface
Disable Mouse interface
IBM keyboard Translate Mode
Reserve
5
6
7
A7h
A8h
Disable Auxiliary Device Interface
Enable Auxiliary Device Interface
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July, 2008
V.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
