F71862
7. Function Description
7.1 Power on Strapping Option
The F71862 provides four pins for power on hardware strapping to select functions. There
is a form to describe how to set the functions you want.
Pin No.
1
Symbol
Value
Description
FWH_TRAP
1
0
1
0
1
0
1
0
1
0
SPI as a backup BIOS (Default)
SPI as a primary BIOS
2
PWM_DC
Fan control mode: PWM mode. ( Default)
Fan control mode: Linear mode.
SPI function disable (Default)
5
SPI_TRAP
FAN60_100
Config4E_2E
SPI function enable
121
124
Power on Fan speed default duty is 60%(PWM)(Default)
Power on Fan speed default duty is 100%(PWM)
Configuration Register I/O port is 4E/4F. (Default)
Configuration Register I/O port is 2E/2F.
7.2 FDC
The Floppy Disk Controller provides the interface between a host processor and one
floppy disk drives. It integrates a controller and a digital data separator with write
pre-compensation, data rate selection logic, microprocessor interface, and a set of registers.
The FDC supports data transfer rates of 250 Kbps, 300 Kbps, 500 Kbps, and 1 Mbps. It
operates in PC/AT mode and supports 3-mode type drives.
The FDC configuration is handled by software and a set of Configuration registers.
Status, Data, and Control registers facilitate the interface between the host microprocessor
and the disk drive, providing information about the condition and/or state of the FDC. These
configuration registers can select the data rate, enable interrupts, drives, and DMA modes,
and indicate errors in the data or operation of the FDC/FDD. The controller manages data
transfers using a set of data transfer and control commands. These commands are handled
in three phases: Command, Execution, and Result. Not all commands utilize all these three
phases.
The below content is about the FDC device register descriptions. All the registers are
for software porting reference.
Status Register A (PS/2 mode) Base + 0
Bit
Name
R/W Default
Description
18
July, 2008
V.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
