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F71862 参数 Datasheet PDF下载

F71862图片预览
型号: F71862
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 110 页 / 837 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71862  
1
0
SEG_FFEF_EN  
SEG_FFF0_EN  
R/W  
R/W  
-
0: disable address 0xFFEE – 0xFFEFFFFF decode  
1: enable address 0xFFEE0000 – 0xFFEFFFFF decode  
This register is power on trapped by SOUT2/SPI_DIS. Pull down to enable.  
0
0: disable address 0xFFF00000 – 0xFFF7FFFF decode  
1: enable address 0xFFF00000 – 0xFFF7FFFF decode  
8.1.10 Power LED Function Select Register Index 28h  
Bit Name R/W Default  
Description  
7-4 Reserved  
-
-
Reserved.  
3
2
1
0
GPIO43_SEL  
R/W  
0
0: IRRX/GPIO43 functions as IRRX.  
1: IRRX/GPIO43 functions as GPIO43.  
GPIO42_SEL  
GPIO41_SEL  
GPIO40_SEL  
R/W  
R/W  
R/W  
0
0
0
0: IRTX/GPIO42 functions as IRTX.  
1: IRTX/GPIO42 functions as GPIO42.  
0: FANCTRL3/GPIO41 functions as FANCTRL3.  
1: FANCTRL3/GPIO41 functions as GPIO41.  
0: FANIN3/GPIO40 functions as FANIN3.  
1: FANIN3/GPIO40 functions as GPIO40.  
8.1.11 Multi Function Select 1 Register Index 29h (Powered by VSB3V)  
Bit  
Name  
R/W Default  
Description  
7
6
Reserved  
R/W  
R/W  
-
Reserved  
FDD_PROT_STS  
LEC_VCC_PRO  
KB_MO_SWP  
0
0: FDD write-protect status depends on PIN18(WPT#)  
1: FDD is write-protected  
5
4
R/W  
R/W  
0
0
0: LED_VCC (PIN65) is tri-state if VCC power loss  
1: LED_VCC (PIN65) is still programmable while VCC power loss  
0: KB/MOUSE signal as default.  
1: KB/MOUSE signal swapped.  
3
2
Reserved  
R/W  
R/W  
-
Reserved  
GPIO02_SEL  
0
0: SLOTOCC#/GPIO02 will functions as SLOTOCC#.  
1: SLOTOCC#/GPIO02 will functions as GPIO02.  
1
0
WDT_GP03_EN  
ALERT_GP_EN  
R/W  
R/W  
0
0
0: GPIO03/WDTRST# will function as GPIO03  
1: GPIO03/WDTRST# will function as WDTRST#.  
0: GPIO15/LED_VSB/ALERT# will function as GPIO15/LED_VSB controlled  
by GPIO15_SEL register.  
1: GPIO15/LED_VSB/ALERT# will function as ALERT#.  
8.1.12 Multi Function Select 2 Register Index 2Ah (Powered by VSB3V)  
Bit  
Name  
R/W Default  
Description  
74  
July, 2008  
V.28P  
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