F71869A
Fan1 duty update rate:
00: 2Hz
1-0 FAN1_DN_RATE
R/W
01
01: 5Hz (default)
10: 10Hz
11: 20Hz
6.6.61 FAN1 and FAN2 START UP DUTY-CYCLE/VOLTAGE ⎯ Index 9Ch
Bit
Name
R/W Default
Description
When fan start, the FAN_CTRL2 will increase duty-cycle from 0 to this
(value x 8) directly. And if fan speed is down, the FAN_CTRL 2 will
decrease duty-cycle to 0 when the PWM duty cycle is less than this
(value x 4).
FAN2_STOP
_DUTY
7-4
R/W
R/W
5h
5h
When fan start, the FAN_CTRL 1 will increase duty-cycle from 0 to
this (value x 8 directly. And if fan speed is down, the FAN_CTRL 1 will
decrease duty-cycle to 0 when the PWM duty cycle is less than this
(value x 4).
FAN1_STOP
_DUTY
3-0
6.6.62 FAN3 START UP DUTY-CYCLE/VOLTAGE ⎯ Index 9Dh
Bit
Name
R/W Default
Description
7-4
Reserved
-
-
Reserved.
When fan start, the FAN_CTRL 3 will increase duty-cycle from 0 to
this (value x 8 directly. And if fan speed is down, the FAN_CTRL 3 will
decrease duty-cycle to 0 when the PWM duty cycle is less than this
(value x 4).
FAN3_STOP_
DUTY
3-0
R/W
5h
6.6.63 FAN PROGRAMMABLE DUTY-CYCLE/VOLTAGE LOADED AFTER POWER-ON ⎯ Index 9Eh
Bit
Name
R/W Default
Description
This byte will be immediately loaded as Fan duty value after VDD is
powered on if it has been programmed before shut down.
7-0 PROG_DUTY_VAL R/W
66h
6.6.64 Fan Fault Time Register ⎯ Index 9Fh
Bit
7
Name
R/W Default
Description
FAN_PROG_SEL R/W
FAN_MNT_SEL R/W
0
0
Set this bit to “1” will enable accessing registers of other bank.
Set this bit to monitor a slower fan.
6
93
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
