F71869A
6.4
UART2 Registers (CR02)
6.4.1 UART 2 Device Enable Register ⎯ Index 30h
Bit
Name
R/W Default
Description
7-1
Reserved
-
-
Reserved
0: disable UART 2.
1: enable UART 2.
0
UR2_EN
R/W
1
6.4.2 Base Address High Register ⎯ Index 60h
Bit
Name
R/W Default
Description
Description
Description
7-0 BASE_ADDR_HI R/W
02h The MSB of UART 2 base address.
6.4.3 Base Address Low Register ⎯ Index 61h
Bit Name R/W Default
7-0 BASE_ADDR_LO R/W
F8h The LSB of UART 2 base address.
6.4.4 IRQ Channel Select Register ⎯ Index 70h
Bit
7-4
3-0
Name
R/W Default
Reserved
-
-
Reserved.
Select the IRQ channel for UART 2.
SELUR2IRQ
R/W
3h
6.4.5 RS485 Enable Register ⎯ Index F0h
Bit
7-6
5
Name
R/W Default
Description
Reserved
RS485_INV
-
-
-
-
Reserved.
Write “1” will invert the RTS# if RS485_EN is set.
0: RS232 driver.
4
3
RS485_EN
RXW4C_IR
R/W
R/W
0
0
1: RS485 driver. RTS# drive high when transmitting data, otherwise is
kept low.
0: No reception delay when SIR is changed form TX to RX.
1: Reception delays 4 characters time when SIR is changed form TX
to RX.
0: No transmission delay when SIR is changed form RX to TX.
2
TXW4C_IR
Reserved
R/W
-
0
-
1: Transmission delays 4 characters time when SIR is changed form
RX to TX.
Reserved.
1-0
68
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
