F71869A
Make code status of GPIO36. It will be set if GPIO36 is pressed
(falling edge). Write “1” to clear this bit.
6
5
4
3
2
1
0
GP36_MAKE_STS R/W
GP35_MAKE_STS R/W
GP54_MAKE_STS R/W
GP53_MAKE_STS R/W
GP52_MAKE_STS R/W
GP51_MAKE_STS R/W
GP50_MAKE_STS R/W
0
0
0
0
0
0
0
Make code status of GPIO35. It will be set if GPIO35 is pressed
(falling edge). Write “1” to clear this bit.
Make code status of GPIO54. It will be set if GPIO54 is pressed
(falling edge). Write “1” to clear this bit.
Make code status of GPIO53. It will be set if GPIO53 is pressed
(falling edge). Write “1” to clear this bit.
Make code status of GPIO52. It will be set if GPIO52 is pressed
(falling edge). Write “1” to clear this bit.
Make code status of GPIO51. It will be set if GPIO51 is pressed
(falling edge). Write “1” to clear this bit.
Make code status of GPIO50. It will be set if GPIO50 is pressed
(falling edge). Write “1” to clear this bit.
6.8.41 GPIO5 KBC Emulation Control Register 2⎯ Index AFh
Bit
Name
R/W Default
Description
0: Disable KBC emulation function.
7
GP_KBC_EN
R/W
0
1: Enable KBC emulation function.
This bit is only available when EVENT_EN_SEL is “0”
0: One byte is sent when GPIO5 event occurs.
1: Two bytes are sent when GPIO5 event occurs. The prefix code is
defined by GP_PRE_CODE.
6
PRE_CODE_EN R/W
0
This bit is only available when EVENT_EN_SEL is “0”
5
4
Reserved
-
-
Reserved.
0: Disable GPIO54 event detection.
1: Enable GPIO54 event detection.
This bit is only available when EVENT_EN_SEL is “0”
GP54_EVENT_EN R/W
GP53_EVENT_EN R/W
0
0: Disable GPIO53 event detection.
1: Enable GPIO53 event detection.
This bit is only available when EVENT_EN_SEL is “0”
3
2
1
0
0
0
0
0
When EVENT_EN_SEL is “1”, the register is GP37_EVENT_EN.
0: Disable GPIO52/GPIO37 event detection.
1: Enable GPIO52/GPIO37 event detection.
GP52_EVENT_EN/
R/W
GP37_EVENT_EN
When EVENT_EN_SEL is “1”, the register is GP36_EVENT_EN.
0: Disable GPIO51/GPIO36 event detection.
1: Enable GPIO51/GPIO37 event detection.
GP51_EVENT_EN/
R/W
GP36_EVENT_EN
When EVENT_EN_SEL is “1”, the register is GP35_EVENT_EN.
0: Disable GPIO50/GPIO35 event detection.
1: Enable GPIO50/GPIO35 event detection.
GP50_EVENT_EN/
R/W
GP35_EVENT_EN
6.8.42 GPIO6 Output Enable Register ⎯ Index 90h
Bit
Name
R/W Default
Description
0: GPIO67 is in input mode.
1: GPIO67 is in output mode.
7
GPIO67_OE
R/W
R/W
0
0
0: GPIO66 is in input mode.
1: GPIO66 is in output mode.
6
GPIO66_OE
126
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
