Feature Integration Technology Inc.
Fintek
F15353
4.4. I2C Interface Pin
Pin No. Pin Name
Type
PWR
Description
Serial clock input pin. Since signal processing is done on
the SCL signal rising/falling edge, give great care to the
rising/falling time and comply strictly with the
specifications.
VDD
6
7
SCL
SDA
INst
Serial data I/O pin. Normally, it is pulled up to the VDD voltage by a
resistor and connected with another open-drain output or
open-collector output device via a wired-OR connection.
VDD
I/OD1ost
V0.12P
7