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FTRJ1721P1WCL 参数 Datasheet PDF下载

FTRJ1721P1WCL图片预览
型号: FTRJ1721P1WCL
PDF下载: 下载PDF文件 查看货源
内容描述: OC- 48 LR - 1 / STM L- 16.1多速率可插拔SFP收发器 [OC-48 LR-1/STM L-16.1 Multirate Pluggable SFP Transceiver]
分类和应用: 光纤局域网通信
文件页数/大小: 11 页 / 728 K
品牌: FINISAR [ FINISAR CORPORATION. ]
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FTRJ1721P1xCL Pluggable SFP Product Specification – December 2003  
VIII. Digital Diagnostic Functions  
Finisar FTRJ1721P1xCL SFP transceivers support the 2-wire serial communication  
protocol as defined in the SFP MSA1. It is very closely related to the E2PROM defined in  
the GBIC standard, with the same electrical specifications.  
The standard SFP serial ID provides access to identification information that describes  
the transceiver’s capabilities, standard interfaces, manufacturer, and other information.  
Additionally, Finisar SFP transceivers provide a unique enhanced digital diagnostic  
monitoring interface, which allows real-time access to device operating parameters such  
as transceiver temperature, laser bias current, transmitted optical power, received optical  
power and transceiver supply voltage. It also defines a sophisticated system of alarm and  
warning flags, which alerts end-users when particular operating parameters are outside of  
a factory set normal range.  
The SFP MSA defines a 256-byte memory map in E2PROM that is accessible over a  
2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic  
monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally  
defined serial ID memory map remains unchanged. The interface is identical to, and is  
thus fully backward compatible with both the GBIC Specification and the SFP Multi  
Source Agreement. The complete interface is described in Finisar Application Note AN-  
2030: “Digital Diagnostics Monitoring Interface for SFP Optical Transceivers”.  
The operating and diagnostics information is monitored and reported by a Digital  
Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed  
through a 2-wire serial interface. When the serial protocol is activated, the serial clock  
signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the  
SFP transceiver into those segments of the E2PROM that are not write-protected. The  
negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod  
Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with  
SCL to mark the start and end of serial protocol activation. The memories are organized  
as a series of 8-bit data words that can be addressed individually or sequentially.  
For more information, please see the SFP MSA documentation1 or Finisar Application  
Note AN-2030.  
Digital diagnostics for the FTRJ1721P1xCL are externally calibrated by default.  
Please note that evaluation board FDB-1018 is available with Finisar ModDEMO  
software that allows simple to use communication over the 2-wire serial interface.  
Finisar Corporation December 17, 2003 Rev. G  
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