MC81F4432
26. RESET
26.1 Reset Process
1
2
3
4
5
6
7
Oscillator
RESETB
FFFE
FFFF
start
Address Bus
Data Bus
FE
?
ADL
ADH
OP
Stabilization Time
1
RESET Process Step
Main Program
Tst =
X 256
fxin / 1024
Figure 26-1 Timing Diagram After Reset
When the reset event is occurred, there is a „stabilization time‟ at the beginning. This time is counted
from 00h to FFh by BIT. So it takes 1/(fxin/1024) * 256 second.
After that, the „reset process step‟ is started. It takes 6 system clock time. At this time, following
statuses are initialized.
On- chip Hardware
Program Counter ( PC )
Initial Value
high byte = a byte at FFFFh
low byte = a byte at FFFEh
FFFFh and FFFEh stores the reset vector.
RAM Page Register ( PRP )
G-flag ( G )
0
0
Operation Mode
OSCS setting of Rom option
Control registers
Initialized by reset values
(See „9.6 Control Registers ( SFR )‟ on page 56)
Low Voltage Reset
LVREN setting of Rom option
26-1 Initializing Status by Reset
After that, the main program execution is started from the reset vector address which is stored at
FFFFh and FFFFEh.
October 19, 2009 Ver.1.35
167
FINECHIPS [ FINECHIPS ]
