MC81F4x16
11.2 Interrupt Sequence
An interrupt request is held until the interrupt is accepted or the interrupt latch is cleared to “0” by a
reset or an instruction. Interrupt acceptance sequence requires 8 cycles of fXIN (1μs at fXIN=
4MHz) after the completion of the current instruction execution. The interrupt service task is
terminated upon execution of an interrupt return instruction [RETI].
Interrupt acceptance
1. The interrupt master enable flag (I-flag) is cleared to “0” to temporarily disable the acceptance of
any following maskable interrupts. When a non-maskable interrupt is accepted, the acceptance of
any following interrupts is temporarily disabled.
2. Interrupt request flag for the interrupt source accepted is cleared to “0”.
3. The contents of the program counter (return address) and the program status word are saved
(pushed) onto the stack area. The stack pointer decreases 3 times.
4. The entry address of the interrupt service program is read from the vector table address and the
entry address is loaded to the program counter.
5. The instruction stored at the entry address of the interrupt service program is executed.
Figure 11-2 Timing chart of Interrupt Acceptance and Interrupt Return Instruction
A interrupt request is not accepted until the I-flag is set to “1” even if a requested interrupt has higher
priority than that of the current interrupt being serviced. When nested interrupt service is required, the
I-flag should be set to “1” by “EI” instruction in the interrupt service program. In this case, acceptable
interrupt sources are selectively enabled by the individual interrupt enable flags.
Saving/Restoring the general-purpose registers
The program status word are automatically saved on the stack, but accumulator and other registers
are not saved itself. These registers are saved by the software if necessary. Also, when multiple
interrupt services are nested, it is necessary to avoid using the same data memory area for saving
registers.
The following method is used to save/restore the general-purpose registers.
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October 19, 2009 Ver.1.35
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