MC81F4x16
INTFH
INTERRUPT FLAG HIGH REGISTER
00EEH
7
6
5
4
3
2
1
0
INTFH
T0MIF T0OVIF T1MIF TIOVIF T2MIF T2OVIF T3MIF T3OVIF Reset value: 00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0: No generation
1: Generation
T0MIF
T0OVIF
T1MIF
Timer 0 Match Interrupt Flag Bit
Timer 0 Overflow Interrupt Flag Bit
Timer 1 Match Interrupt Flag Bit
Timer 1 Overflow Interrupt Flag Bit
Timer 2 Match Interrupt Flag Bit
Timer 2 Overflow Interrupt Flag Bit
Timer 3 Match Interrupt Flag Bit
Timer 3 Overflow Interrupt Flag Bit
0: No generation
1: Generation
0: No generation
1: Generation
0: No generation
1: Generation
T1OVIF
T2MIF
0: No generation
1: Generation
0: No generation
1: Generation
T2OVIF
T3MIF
0: No generation
1: Generation
0: No generation
1: Generation
T3OVIF
INTFL
INTERRUPT FLAG LOW REGISTER
00EFH
7
6
–
–
5
–
–
4
–
–
3
–
–
2
1
0
INTFL
IICIF
R/W
–
–
URIF UTIF
Reset value: 00H
R/W
R/W
0: No generation
1: Generation
IICIF
–
IIC Interrupt Flag Bit
bit6 – bit2
Not used for MC81F4x16
0: No generation
1: Generation
URIF
UART Rx Interrupt Flag Bit
0: No generation
1: Generation
UTIF
UART Tx Interrupt Flag Bit
Note:
When you use „Shard Interrupt Vector‟, those INTFH and INTFL are used to recognize which
interrupt is generated. See „11.4 Shared Interrupt Vector‟ on page 98 for more information.
October 19, 2009 Ver.1.35
95
FINECHIPS [ FINECHIPS ]
