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FPD1500SOT89E 参数 Datasheet PDF下载

FPD1500SOT89E图片预览
型号: FPD1500SOT89E
PDF下载: 下载PDF文件 查看货源
内容描述: 低噪声高线性度PACKAGED PHEMT [LOW NOISE HIGH LINEARITY PACKAGED PHEMT]
分类和应用: 晶体晶体管
文件页数/大小: 12 页 / 783 K
品牌: FILTRONIC [ FILTRONIC COMPOUND SEMICONDUCTORS ]
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FPD1500SOT89  
Datasheet v3.0  
1
ABSOLUTE MAXIMUM RATING :  
PARAMETER  
Drain-Source Voltage  
Gate-Source Voltage  
Drain-Source Current  
Gate Current  
SYMBOL  
VDS  
TEST CONDITIONS  
-3V < VGS < +0V  
ABSOLUTE MAXIMUM  
8V  
VGS  
0V < VDS < +8V  
-3V  
IDS  
For VDS < 2V  
IDSS  
IG  
Forward or reverse current  
Under any acceptable bias state  
Under any acceptable bias state  
Non-Operating Storage  
See De-Rating Note below  
Under any bias conditions  
2 or more Max. Limits  
15mA  
2
RF Input Power  
PIN  
350mW  
175°C  
-55°C to 150°C  
2.3W  
Channel Operating Temperature  
Storage Temperature  
TCH  
TSTG  
PTOT  
Comp.  
Total Power Dissipation  
Gain Compression  
5dB  
3
Simultaneous Combination of Limits  
Notes:  
1TAmbient = 22°C unless otherwise noted; exceeding any one of these absolute maximum ratings may cause  
permanent damage to the device  
2Max. RF Input Limit must be further limited if input VSWR > 2.5:1  
3Users should avoid exceeding 80% of 2 or more Limits simultaneously  
4Total Power Dissipation defined as: PTOT (PDC + PIN) – POUT  
,
where PDC: DC Bias Power, PIN: RF Input Power, POUT: RF Output Power  
Total Power Dissipation to be de-rated as follows above 22°C:  
PTOT= 2.3 - (0.016W/°C) x TPACK  
where TPACK= source tab lead temperature above 22°C  
(coefficient of de-rating formula is the Thermal Conductivity)  
Example: For a 65°C carrier temperature: PTOT = 2.3W – (0.016 x (65 – 22)) = 1.61W  
BIASING GUIDELINES:  
Active bias circuits provide good performance stabilization over variations of operating  
temperature, but require a larger number of components compared to self-bias or dual-biased.  
Such circuits should include provisions to ensure that Gate bias is applied before Drain bias.  
Dual-bias circuits are relatively simple to implement, but will require a regulated negative voltage  
supply for depletion-mode devices.  
For standard class A operation, a 50% of IDSS bias point is recommended. A small amount of  
RF gain expansion prior to the onset of compression is normal for this operating point. A class  
A/B Bias of 25-33% of IDSS to achieve better OIP3, and Noise Figure performance is suggested.  
2
Specifications subject to change without notice  
Filtronic Compound Semiconductors Ltd  
Tel: +44 (0) 1325 301111  
Fax: +44 (0) 1325 306177  
Email: sales@filcs.com  
Website: www.filtronic.com  
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