CMP0417AAx-E
CMOS LPRAM
Power Up Sequence
1. Apply Power
2. Maintain stable power for a minimum of 200us with /CS=VIH
Standby Mode State machines
Power On
/CS=VIH
/CS=VIH, /ZZ=VIH
Wait 200us
Initial State
/CS=VIL, /ZZ=VIH
/UB or/and /LB=VIL
/CS=VIH, /ZZ=VIL
Active
Mode
/CS=VIlL
/ZZ=VIH
/CS=VIlL
/ZZ=VIH
/CS=VIH
/ZZ=VIL
/CS=VIH
(or/and /UB=/LB=VIH
)
/ZZ=VIH
Low Power
/CS=VIH, /ZZ=VIL
/CS=VIH, /ZZ=VIL
DPD
Standby Mode
Modes 1
(Data Invalid)
(8M/4M/2M bits)
Standby Mode Characteristics
Mode
Standby
Memory Cell Data
Valid
Standby Current(uA)
Wait Time(us)
70 (ISB1)
10 (ISB0)
40 (ISB0a)
50 (ISB0b)
70 (ISB0c)
0
200
0
Deep Power Down Mode
Invalid
¼ valid
½ valid
valid
Low Power Modes
0
0
Revision 0.5
Aug. 2006
6
FIDELIX [ FIDELIX ]
