FQP13N50/FQPF13N50
QFET
FQP13N50/FQPF13N50
500V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply, power
factor correction, electronic lamp ballast based on half
bridge.
TM
Features
•
•
•
•
•
•
12.5A, 500V, R
DS(on)
= 0.43Ω @V
GS
= 10 V
Low gate charge ( typical 45 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
●
◀
▲
●
●
G
!
G DS
TO-220
FQP Series
GD S
TO-220F
FQPF Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
T
C
= 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25°C)
Drain Current
- Continuous (T
C
= 100°C)
Drain Current
- Pulsed
(Note 1)
FQP13N50
500
12.5
7.9
50
±
30
(Note 2)
(Note 1)
(Note 1)
(Note 3)
FQPF13N50
12.5 *
7.9 *
50 *
810
12.5
17
4.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
C
= 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
170
1.35
-55 to +150
300
56
0.45
* Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
R
θJC
R
θCS
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
FQP13N50
0.74
0.5
FQPF13N50
2.23
--
Units
°C/W
°C/W
©2002 Fairchild Semiconductor Corporation
Rev. B, September 2002
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
