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FDS6975 参数 Datasheet PDF下载

FDS6975图片预览
型号: FDS6975
PDF下载: 下载PDF文件 查看货源
内容描述: 双P沟道逻辑电平MOSFET PowerTrenchTM [Dual P-Channel, Logic Level, PowerTrenchTM MOSFET]
分类和应用: 晶体晶体管功率场效应晶体管开关脉冲光电二极管
文件页数/大小: 8 页 / 250 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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Electrical Characteristics
(T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= -250 µA
I
D
= -250 µA, Referenced to 25 C
V
DS
= -24 V, V
GS
= 0 V
T
J
= 55°C
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= -250 µA
I
D
= 250 µA, Referenced to 25
o
C
V
GS
= -10 V, I
D
= -6 A
T
J
=125°C
V
GS
= -4.5 V, I
D
= -5 A
o
-30
-21
-1
-10
100
-100
-1
-1.7
4
0.025
0.033
0.034
-20
16
1540
400
170
0.032
0.051
0.045
-3
V
mV/
o
C
µA
µA
nA
nA
V
mV/
o
C
BV
DSS
/
T
J
I
DSS
I
GSSF
I
GSSR
V
GS(th)
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
(Note 2)
ON CHARACTERISTICS
Gate Threshold Voltage
Gate Threshold Voltage Temp. Coefficient
Static Drain-Source On-Resistance
V
GS(th)
/
T
J
R
DS(ON)
I
D(ON)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
Notes:
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
GS
= -10 V, V
DS
= -5 V
V
DS
= -10 V, I
D
= -6 A
V
DS
= -15 V, V
GS
= 0 V,
f = 1.0 MHz
A
S
pF
pF
pF
24
35
75
30
20
ns
ns
ns
ns
nC
nC
nC
-1.3
A
V
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= -15 V, I
D
= -1 A
V
GEN
= -10 V, R
GEN
= 6
13
22
47
18
V
DS
= -10 V, I
D
= -6 A,
V
GS
= -5 V
14.5
4
5
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -1.3 A
(Note 2)
-0.73
-1.2
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is
guaranteed by design while R
θ
CA
is determined by the user's board design.
a. 78
O
C/W on a 0.5 in
2
pad of 2oz copper.
b. 125
O
C/W on a 0.02 in
2
pad of 2oz copper.
c. 135
O
C/W on a 0.003 in
2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDS6975 Rev.C