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FDS6898A 参数 Datasheet PDF下载

FDS6898A图片预览
型号: FDS6898A
PDF下载: 下载PDF文件 查看货源
内容描述: 双N沟道逻辑电平PWM优化的PowerTrench MOSFET [Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET]
分类和应用:
文件页数/大小: 5 页 / 82 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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FDS6898A
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 16 V,
V
GS
= 12 V,
V
GS
= 0 V
V
DS
= 0 V
Min
20
Typ
Max Units
V
mV/°C
1
100
–100
µA
nA
nA
Off Characteristics
21
V
GS
= –12 V, V
DS
= 0 V
V
DS
= V
GS
,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
GS
= 4.5 V, I
D
= 9.4 A
V
GS
= 2.5 V, I
D
= 8.3 A
V
GS
= 4.5 V, I
D
= 9.4 A,T
J
= 125°C
V
GS
= 4.5V,
V
DS
= 5 V
V
DS
= 5 V,
I
D
= 9.4 A
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
0.5
1
–3.5
10
13
14
1.5
V
mV/°C
mΩ
14
18
21
I
D(on)
g
FS
19
47
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
1821
440
208
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= 10 V,
V
GS
= 4.5 V,
I
D
= 1 A,
R
GEN
= 6
10
15
34
16
20
27
55
29
23
ns
ns
ns
ns
nC
nC
nC
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 9.4 A,
16
3
4
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
V
GS
= 0 V,
I
S
= 1.3 A
(Note 2)
1.3
0.7
1.2
A
V
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 78°C/W when
2
mounted on a 0.5in
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
2
in pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3.
The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied
FDS6898A Rev C (W)