E S I
E S I
ADVANCED INFORMATION
Excel Semiconductor inc.
Table 20. ERASE AND PROGRAMMING PERFORMANCE
Parameter
Typ (Note 1) Max (Note 2) Unit
Comments
Sector Erase Time
0.7
50
6
15
sec
sec
us
Excludes 00h programming prior to
erasure (Note 4)
Chip Erase Time
Byte Program Time
150
120
210
76
Accelerated Byte/Word Program Time
Word Program Time
4
us
Exclude system level overhead (Note 5)
8
us
Byte Mode
Word Mode
25
17
Chip Program Time (Note 3)
sec
50
Notes:
1. Typical program and erase times assume the following conditions: 25oC, 3.0V Vcc, 10,000 cycles. Additionally, programming
typicals assume checkerboard pattern.
2. Under worst case conditions of 90oC, Vcc = 2.7V, 100,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two-or-four-bus-cycle sequence for the program command. See
Table 9 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 100,000 cycles
.
Table 21. LATCHUP CHARACTERISTICS
Description
Min
Max
Input voltage with respect to Vss on all pins except I/O pins (including A9, OE#, and RESET#)
- 1.0V
- 1.0V
12.5V
Input voltage with respect to Vss on all I/O pins
Vcc Current
Vcc + 1.0V
+100mA
- 100mA
Note: Includes all pins except Vcc. Test conditions: Vcc = 3.0 V, one pin at a time
Table 22. TSOP AND BGA PACKAGE CAPACITANCE
Parameter Symbol
Parameter Description
Test Setup
Typ
6
Max
7.5
5.0
12
Unit
TSOP
pF
pF
pF
pF
pF
pF
CIN
Input Capacitance
VIN = 0
VOUT = 0
VIN = 0
FBGA
TSOP
FBGA
TSOP
FBGA
4.2
8.5
5.4
7.5
3.9
COUT
Output Capacitance
6.5
9
CIN2
Control Pin Capacitance
4.7
Notes:
1. Sampled, not 100% tested
2. Test conditions TA = 25oC, f=1.0MHz
.
Table 23. DATA RETENTION
Parameter Description
Test conditions
Min
Unit
150oC
125oC
10
20
Years
Minimum Pattern Data Retention Time
Years
53
Rev. 0E May 25, 2006
ES29DL320