E S I
E S I
ADVANCED INFORMATION
Excel Semiconductor inc.
3.3V
Table 12. Test Specifications
2.7k
Ω
Test Condition
70
90
Device
Under
Test
Output Load
1TTL gate
C
L
Output Load Capacitance, CL (including jig
capacitance)
6.2kΩ
30pF
100pF
5 ns
Input Rise and Fall Times
Input Pulse Levels
0.0V ~ 3.0V
1.5V
Input timing measurement reference levels
Output timing measurement reference levels
Figure 16. Test Setup
1.5V
Note: Diodes are IN3064 or equivalent
Key To Switching Waveforms
WAVEFORM
INPUTS
OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Does Not Apply
Changing, State Unknown
Center Line is High Impedance State (High Z)
3.0V
1.5V Output
Input 1.5V
Measurement Level
0.0V
Figure 17. Input Waveforms and Measurement Levels
37
Rev. 0E May 25, 2006
ES29DL320