E S I
E S I
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AC CHARACTERISTICS
tAHT
tAS
Address
tASO
tAHT
CE#
tOEH
tCEPH
WE#
OE#
tOEPH
tDH
tOE
DQ6/DQ2
RY/BY#
Valid Data
Valid Data
Valid Status
(first read)
Valid Status
(second read)
Valid Status
(stops toggling)
NOTE : VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read
cycle, and array data read cycle.
Figure 23. Toggle Bit Timings (During Embedded Algorithms)
Enter
Embedded
Erasing
Enter Erase
Suspend
Program
Enter
Suspend
Erase
Resume
WE#
Erase
Erase
Suspend
Program
Erase
Suspend
Read
Erase
Complete
Erase
Suspend
Read
Erase
DQ6
DQ2
NOTE : DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE# to toggle
DQ2 and DQ6.
Figure 24. DQ2 vs. DQ6
37
Rev. 1D January 5, 2006
ES29LV800D
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